Waymo has disclosed a custom 5nm ASIC designed to process sensor data before it reaches the main machine-learning system in its robotaxis. In an official Waymo engineering post published August 20, the company described a purpose-built compute stack for real-time driving, including more than 1,000 TOPS of front-end ML performance from the ASICs.
The chip is part of a wider redesign of the computer carried in the vehicle, not a claim that every component is made by Waymo. The company says its latest system draws on more than 200 million miles of fully autonomous experience and combines custom silicon with CPUs, GPUs and other accelerators. Waymo also lists AMD, Micron, NVIDIA, Samsung, SanDisk, Socionext and TSMC as partners in the autonomous computing system.
A front end for raw sensor data
Waymo’s ASIC is aimed at the messy first stage of autonomous driving. Specialized accelerators process and fuse raw lidar, radar and camera streams, then run neural networks on that data in real time. The company says the design includes temporal denoising for low-light perception and supports models ranging from sparse convolutions to dense transformers.
Waymo says the ASICs alone deliver more than 1,000 TOPS for front-end processing and ML models. That figure describes a dedicated part of the vehicle computer, so it should not be read as a complete measurement of the robotaxi’s driving performance or as a direct comparison with a general-purpose data-center GPU. The company does not publish a precision or benchmark methodology for the TOPS figure in the blog post.
The latest system can process high-fidelity data from 13 high-resolution cameras simultaneously and in real time, according to Waymo. That sensor load explains why the company is treating bandwidth, quantization and sensor design as one engineering problem rather than buying an accelerator and tuning software around it. The approach also puts the ASIC in a different role from the main driving model: it prepares and compresses information so later stages can work with a more useful view of the road.
That division of labor echoes the distinction in our NPU versus GPU and CPU guide, although Waymo’s part is a vehicle-specific ASIC rather than a consumer NPU. The principle is similar: move a repeatable workload onto dedicated hardware when latency and power matter more than general-purpose flexibility.
Redundancy is a compute feature
Waymo says the system is built around three requirements: responsiveness, ruggedization and redundancy. Processing stays onboard so the vehicle can make decisions within milliseconds. The hardware is integrated with the vehicle’s liquid cooling and designed for vibration, shock and extreme temperatures. Two independent compute engines run in parallel, allowing one to take over if the other fails.
The company says raw onboard compute has increased 20 times in eight years, but the engineering target is not a single peak number. Waymo is optimizing the delay from a sensor pixel to vehicle actuation while keeping the system quiet, efficient and small enough for a trunk. That makes the design relevant to the broader hardware question in our memory bandwidth coverage: practical AI performance depends on moving data reliably, not only on adding more arithmetic units.
Waymo’s post offers a rare public view of the silicon inside a deployed autonomous system, but it does not establish that the ASIC alone makes the robotaxi safer or better. Its stated role is narrower and more concrete: process sensor inputs quickly, support the front end of the ML stack and help a redundant onboard computer keep operating without a human driver.
